This lecture concludes the set on concurrency, with three distinctive challenges for concurrent programming and some possible solutions: lock networks, deadlock, and hand-over-hand locking; priority inversion in thread scheduling; and relaxed memory models for modern processor architectures.
We had two additional examples of Erlang in practice from APL students: as the concurrent engine behind WhatsApp; and in Elarva, a runtime monitoring took for Erlang.
CPU features that make concurrency even trickier
Find out the meaning of the following words, in the context of CPU architecture and execution.
- Pipeline hazard
- Out-of-order execution
- Speculative execution
- Branch prediction
How to make database queries from Java
- Find out what the initialism JDBC stands for.
- Find a tutorial about JDBC, and post a link to the mailing list.
What Really Happened on Mars? Collection by Mike Jones of accounts of the priority inversion problem on software in the Mars Pathfinder lander.
Note: Contrary to what I described in the lecture, the relevant runtime here was not Java but the VxWorks real-time operating system. For details of exactly what priority management facilities that provides, and what happened on the mission, read the detailed description by Glenn Reeves, leader of the Mars Pathfinder software team, included in the collection above.
Also, I discover that while there was a remote shell available on the lander, sadly that’s not what was used for the software update.
- Mars Pathfinder NASA overview of the mission, the Pathfinder lander and Sojourner robot rover.
Those references I think fairly readable and entertaining. The next few, by contrast, are interesting but quite hard work and only there for when you really are keen to know just what’s going on with concurrent memory models. If you have a preferred tutorial or explanation on this, please let me know and I’ll add a link.
- The Java Memory Model. Reference page by Bill Pugh, a grab-bag of links to information on the JMM.
- Java Memory Model Pragmatics. Transcript and slides from a 2014 explanatory talk by Alexey Shipilëv.
- Relaxed-Memory Concurrency. Extensive list from Peter Sewell of work on models for the actual concurrency behaviour of x86, Power and ARM chips, and in particular the relation to C11/C++11.